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Advanced Packaging and 3D Heterogeneous Integration
Improve Productivity with Submicron Imaging & Analysis
With today’s semiconductor devices, transistor scaling alone is no longer sufficient to increase performance and system miniaturization. Innovations in semiconductor packaging, such as new 2.5D/3D designs using through-silicon vias (TSVs) and chiplets using hybrid bonding, enable system-in-package (SIP) and heterogeneous integration. Characterization and failure analysis of these advanced technologies are critical for overall development and delivery of high-yielding, reliable products.
New package architectures introduce new types of defects buried deep below many layers, challenging the entire failure analysis workflow – from electrical characterization to physical analysis and root cause determination. Traditional workflows for high-resolution package analysis of buried features lack the required combination of speed, resolution, and 3D information to understand the problems.
Non-destructive 3D Tomography of Heterogeneous Integration Package
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3D X-ray Image of Heterogeneous Package
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3D Analysis of Heterogeneous Integration Package
3D X-ray microscopy reconstruction highlights interconnect bridge connecting multiple chips.
75 µm C4 bumps and 30 µm microbumps are clearly visible.
Acquired by ZEISS Xradia Versa X-ray microscope
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Virtual Cross Section of Microbumps
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Virtual Cross Section of Microbumps
Virtual cross section from same analysis highlights 30 µm microbumps imaged at 0.8 µm/voxel resolution.
Acquired by ZEISS Xradia Versa X-ray microscope
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Virtual Cross Section of C4 Bumps
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Virtual Cross Section of C4 Bumps
Virtual cross section from same analysis details 75 μm C4 bumps imaged at 0.8 μm/voxel resolution.
Acquired by ZEISS Xradia Versa X-ray microscope
Nanoscale 3D X-ray Imaging of Smartphone Mainboard
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3D X-ray Image of Smartphone Main Control Board
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X-ray Image of Complete Mainboard
Large field of view 3D X-ray scan of package-on-package (POP) from a smartphone main control board imaged at 10 µm/voxel.
Acquired by ZEISS Xradia Context microCT
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Solder Balls in Smartphone Main Control Board
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Virtual Cross Section of Solder Balls
Virtual cross section from same analysis showing solder balls connecting the bionic chip to the main substrate imaged at 10 µm/voxel.
Acquired by ZEISS Xradia Context microCT
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Solder Bumps in Smartphone Main Control Board
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Virtual Slice of Solder Bumps
Virtual cross section of a different layer in the same sample showing solder bumps connecting the 3D NAND flash chip to the main substrate imaged at 10 µm/voxel.
Acquired by ZEISS Xradia Context microCT
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3D Package Interconnects
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Rapid Analysis of Deeply Buried 3D Package Interconnects
Crossbeam laser FIB-SEM provides fast, high-quality cross sections of 25 µm diameter Cu-pillar microbumps and BEOL structures buried 860 µm deep in a 3D integrated circuit (IC) package with total time to results of <1 hour. Left: 3D IC prepared using laser ablation and FIB polishing. Right: Backscattered electron image of microbump.
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Large FOV of 2.5D Package Interconnects
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High-resolution, Extreme Field of View Imaging for 2.5D Package Interconnects
The distortion-free, large field of view provided by GeminiSEM FE-SEM enables high productivity and efficient analysis of package and BEOL structures.
Inset: Close up of 2.5D package cross section shows grain structure and solder crack in 20 µm microbump.
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Intermetallic Layers in Solder Bumps
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Intermetallic Layer Analysis of Solder Bumps
Cross section of a flip-chip solder bump shows material contrast, channeling contrast of grain structure, and adhesion.
Inset: Failure at the UBM RDL interface.
Imaged with GeminiSEM FE-SEM