An employee looking in the ZEISS SMT clean room looking at a photomask
Photomask tuning solutions

ZEISS ForTune Systems

Exceeding the boundaries of lithography

Wafer Fabs highly depend on predictability and credibility. Achieving high yields is essential to convince their customers of the capability of the fab. Any process excursion that reduces the yield significantly undermines the trust of the customer into the fab’s capability and reliability. ZEISS offers an innovative solution preventing excursion by improving intra-field Critical-Dimension-Uniformity (CDU) and improving the Wafer On-Product-Overlay (OPO).

  • Reduces process defects (DUV)
  • Improves Wafer On-Product Overlay (DUV)
  • Reduces Mix and Match Overlay (EUV)
  • Tuning Process of a Photomask under a microscope
  • Tuning Process of a Photomask under a microscope
  • Tuning Process of a Photomask under a microscope
  • Tuning Process of a Photomask under a microscope

High performance mask tuning system

ZEISS ForTune and ZEISS ForTune EUV improve wafer intra-field litho parameters by mask tuning in high lateral resolution on top of any other available solution in the market and at low cost. The systems are available for all market segments (Memory, Logic in DUV and EUV) and cover the following applications:

CDC Application

The probability of process defects caused by wafer intra-field CDU can be reduced applying ZEISS ForTune. Following the excursion prevention strategy increases thereby wafer yield as can be seen in the exampled images.

RegC® Application

Both, ForTune and ForTune EUV, are complimentary to the scanner. The RegC® functionality converts wafer intra-field OPO contributions from non correctable to correctable errors by the scanner in high lateral resolution. By that the wafer OPO is improved on top the scanner knobs capabilities.

  

Many microchips of the semiconductor industry

Reducing process defects

By Excursion Prevention applying ForTune

Patterning excursion is referring to (multiple) parameters deviation from normal that leads to process out of the allowed tolerances.  The patterning excursion can be caused by process parameters and lithography parameters like focus, mask CDU and dose.  Patterning defects can be caused by interaction of multiple lithography parameters, even if the individual parameters are in spec.

To reduce wafer intra-field process defects Excursion Prevention by ZEISS ForTune system is a proven strategy. This can be achieved by using the CDC Application of ForTune: It enables excursion prevention at low effort and low cost in wafer fabs. As a result, yield loss will be reduced significantly.

Photomask is processed with a laser beam

Improved Wafer On-Product Overlay

Registration control functionality helps to achieve better OPO for DUV and EUV

The Wafer On-Product Overlay (OPO) is another limiting key parameter for chip performance which needs to be well controlled. The main contributed parameters can be categorized as inter-field and intra-field parameters. Both can be controlled by the scanner.  However, the scanner is limited in the intra-field overlay resolution and can control only up to the 3rd order polynomial across the slit.  This scanner limitation leads to Non-Correctable Errors (NCE) in high orders that cause OPO is out of specification.  ForTune converts NCE to CE (Correctable Errors)  resulting in an improved intra-field contribution. This helps to reduce the Wafer On-Product Overlay for DUV as well as for EUV masks.

Smallest structures on a semiconductor microchip

Improved Mix and Match

ForTune EUV reduces Overlay between DUV and EUV mask layers and EUV to EUV layers

A high-end mask set consists of multiple DUV masks and some EUV masks. The various layers must be printed accurately on top of each other to achieve a functional and high performing microchip.  

With its RegC® functionality, ForTune EUV reduces the Intra-field contribution which leads to an optimized Wafer Mix & Match Overlay (MMO).

How does mask tuning work?

Watch the video about ZEISS ForTune technology

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