Making complex structures intelligently visible Future-proof microchip development

Moore's law continues: The number of transistors on a microchip is growing continuously. They are becoming ever more compact and powerful. If you no longer want to analyze memory chips in nanofine 2D structures, but in spatial 3D structures, then this places particularly high demands on process control. This applies both to the production of NAND gates, as used in SSD hard disks, but also to the production of memory chips with DRAM technology, which are mostly used as working memory. This also increases the challenges for metrology (measurement technology) and validation in semiconductor manufacturing processes.

The Atlas 5 platform from ZEISS allows the capacities of the 3D Metrology and Inspection Workstation to be expanded. Market-leading solution for fast and accurate tomography speeds up acquisition by scanning only relevant volumes. In the shortest possible time, the required amount of information is represented by large mosaic tiles, with simultaneous multichannel acquisition. The modular architecture, scripting interface of the workflow engine and scalable hardware architecture make customization possible. The sample-centric, correlative environment provides integrated, cross-technology workflows.